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| (R) SP78LC00 Micropower, 100mA CMOS LDO Regulator FEATURES Low Dropout Voltage, 160mV @ 100mA High Output Voltage Accuracy, 2% Guaranteed 100mA Output Ultra Low Shutdown Current, 1A Max Ultra Low GND Current * 110A @ 100mA Load * 28A @ 100A Load Fast Transient Response 78dB PSRR @ 100Hz 40dB PSRR @ 400kHz Extremely Tight Load and Line Regulation Very Low Temperature Coefficient Current and Thermal Limiting Unconditionally stable with 1F Ceramic 5 Pin SOT-23 Package Fixed 3.0V Output 100mA Replacement for 50mA MC78LC OUT 3 IN 2 GND 1 SP78LC00 4 NC 5 NC APPLICATIONS Mobile Phone Data Cables Laptop, Notebook and Palmtop Computers Battery-Powered Equipment Consumer/ Personal Electronics SMPS Post-Regulator DC-to-DC Modules Medical Devices Data Cable Pagers DESCRIPTION The SP78LC00 is a CMOS LDO designed to meet a broad range of applications that require accuracy, speed and ease of use. This LDO offers extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDO handles an extremely wide load range and guarantees stability with a 1F ceramic output capacitor. It has excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. The SP78LC00 is available in fixed 3.0V output voltage version in a small SOT-23-5 package. VIN 1F ceramic 2 3 SP78LC00 1F ceramic 1 VOUT Typical Application Diagram Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 1 ABSOLUTE MAXIMUM RATINGS Supply Input Voltage (VIN) ............................ -2V to 7V Output Voltage (VOUT) ......................... -0.6 to (VIN +1V) Enable Input Voltage (VEN). .......................... -2V to 7V Power Dissipation (PD) ......... Internally Limited, Note 3 Lead Temperature (soldering 5s). ...................... 260C Storage Temperature ......................... -65C to +150C These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. OPERATING RATINGS Input Voltage (VIN) ................................. +2.5V to +6V Enable Input Voltage (VEN) ......................... 0V to +6V Junction Temperature (TJ) .............. -40C to +125C Thermal Resistance, SOT-23-5 (JA) ............. Note 3 ELECTRICAL SPECIFICATIONS VIN = VOUT +1V, IL = 100A, CIN = 1.0F, COUT = 1.0F, TJ = 25C , bold values indicate -40C TJ 125C unless otherwise noted. PARAMETER Output Voltage Accuracy, (VOUT) Output Voltage Temperature Coefficient, Note 4, (VOUT/T) Line Regulation, (VOUT/ VOUT) Load Regulation, Note 5, (VOUT/ VOUT) Dropout Voltage, Note 6, (VIN - VOUT) CONDITIONS Variation from specified VOUT MIN -2 -3 TYP MAX 2 3 UNITS % % ppm/C 60 VIN = (VOUT + 1V) to 6V IL = 0.1mA to 100mA, IL = 100A IL = 50mA IL = 100mA 0.03 0.07 0.2 70 160 28 60 110 78 40 100 150 162 147 0.05 200 0.2 0.25 4 7 120 160 250 300 45 50 120 150 200 250 %/V % mV mV mV mV mV mV A A A A A dB dB mA C C %/W Ground Pin Current, Note 7, (IGND) IL = 100A IL = 50mA IL = 100mA Power Supply Rejection Ratio, (PSRR) Current Limit, (ICL) Thermal Limit Frequency = 100Hz, IL = 10mA Frequency = 400kHz, IL = 10mA VOUT = 0V Regulator Turns Off Regulator Turns On Thermal Regulation, Note 8, (VOUT/PD) Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 2 ELECTRICAL SPECIFICATIONS: Continued VIN = VOUT +1V, IL = 100A, CIN = 1.0F, COUT = 1.0F, TJ = 25C , bold values indicate -40C TJ 125C unless otherwise noted. Note 1. Exceeding the absolute maximum rating may damage the device. Note 2. The device is not guaranteed to function outside its operating rating. Note 3. The maximum allowable power dissipation at any TA (ambient temperature) is PD (MAX) = (TJ (MAX) - TA) / qJA. Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown. The qJA of the SP78LC00 (all versions) is 220C/W mounted on a PC board with minimum copper area (see "Thermal Considerations" section for further details). Note 4. Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. Note 5. Load Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range; from 0.1mA to 100mA. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Note 6. Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at 1V differential. Note 7. Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of the load current plus the ground pin current. Note 8. Thermal regulation is defined as the change in output voltage at a time "t" after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 100mA load pulse at VIN = 6V for t = 10ms. PIN ASSIGNMENTS PIN NUMBER 1 2 3 4,5 NAME GND IN OUT NC FUNCTION Ground Supply Input Voltage Regulator Output Voltage No Connection FUNCTIONAL DIAGRAM VIN C IN IN OUT VOUT C OUT Bandgap REF + Current Limit and Thermal Shutdown R2 VREF 1.25V R1 1.20V GND Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 3 THEORY OF OPERATION General Overview The SP78LC00 is a CMOS LDO designed to meet a broad range of applications that require accuracy, speed and ease of use. This LDO offers extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDO handles an extremely wide load range and guarantee stability with a 1F ceramic output capacitor. It has excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. Thus, overall system accuracy is maintained under all DC and AC conditions. Current Limit and Thermal protection is provided internally and is well controlled. Architecture The SP78LC00 has a current limit of 150mA. The LDO has a two stage amplifier which handles an extremely wide load range (10A to 100mA) and guarantees stability with a 1F ceramic load capacitor. The LDO amplifier has excellent gain and thus touts PSRR performance not found in other CMOS LDOs. The amplifier guarantees no overshoot on power up. The amplifier also contains an active pull down, so that when the load is removed quickly the output voltage transient is minimal; thus output deviation due to load transient is small and fairly well matched when connecting and disconnecting the load. An accurate 1.250V bandgap reference is bootstrapped to the output. This increases both the low frequency and high frequency PSRR. Unlike many LDOs, the bandgap reference is not brought out for filtering by the user. This tradeoff was maid to maintain good PSRR at high frequency (PSRR can be degraded in a system due to switching noise coupling into this pin). Also, often leakages of the bypass capacitor or other components cause an error on this high impedance bandgap node. Thus, this tradeoff has been made with "ease of use" in mind. Protection Current limit behavior is very well controlled, providing less than 10% variation in the current limit threshold over the entire temperature range of the SP78LC00. The SP78LC00 has a current limit of 150mA. Thermal shutdown activates at 162C and deactivates at 147C. Thermal shutdown is very repeatable with only a 2 to 3 degree variation from device to device. Thermal shutdown changes by only 1 to 2 degrees with Vin change from 4V to 7V. Input Capacitor A small capacitor, 1F or higher, is required from VIN to GND to create a high frequency bypass for the LDO amplifier. Any ceramic or tantalum capacitor may be used at the input. Capacitor ESR (effective series resistance) should be smaller than 3. Output Capacitor An output capacitor is required between VOUT and GND to prevent oscillation. A capacitance as low as 0.22F can fulfill stability requirements in most applications. A 1F capacitor will ensure unconditional stability from no load to full load over the entire input voltage, output voltage and temperature range. Larger capacitor values improve the regulator's transient response. The output capacitor value may be increased without limit. The output capacitor should have an ESR (effective series resistance) below 5 and a resonant frequency above 1MHz. No Load Stability The SP78LC00 will remain stable and in regulation with no external load (other than the internal voltage driver) unlike many other voltage regulators. This is especially important in CMOS RAM keep-alive applications. Thermal Considerations The SP78LC00 is designed to provide 100mA of continuous current. Maximum power dissipation can be calculated based on the output current and the voltage drop across the part. To determine the maximum power dissipa- Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 4 THEORY OF OPERATION: Continued tion in the package, use the junction-to-ambient thermal resistance of the device and the following basic equation: (T - T A) PD = J(max) JA TJ(max) is the maximum junction temperature of the die and is 125C. TA is the ambient operating. JA is the junction-to-ambient thermal resistance for the regulator and is layout dependent. The actual power dissipation of the regulator circuit can be determined using one simple equation: PD = (VIN - VOUT)*IOUT + VIN*IGND (VIN - VOUT) * IOUT Substituting PD(max) for PD and solving for the operating conditions that are critical to the application will give the maximum operating conditions for the regulator circuit. For example, if we are operating the SP78LC003.0V at room temperature, with a minimum footprint layout, we can determine the maximum input voltage for a set output current. PD(max) = (125C -25C) = 454mW (220C/W) To prevent the device from entering thermal shutdown, maximum power dissipation can not be exceeded. Using the output voltage of 3.0V and an output current of 100 mA, the maximum input voltage can be determined. Ground pin current can be taken from the electrical spec's- table (I GND =110A at IOUT=100mA). The maximum input voltage is determined as follows: 454mW = (VIN - 3.0V)*100mA + VIN*0.11mA Solving for VIN, we get: VIN = (454mW + 300mW) 100.11mA After calculations, we find that the maximum input voltage of a 3.0V application at 100mA of output current in an SOT-23-5 package is7.53V. Dual-Supply Operation When used in dual supply systems where the regulator load is returned to a negative supply, the output voltage must be diode clamped to ground. TYPICAL CHARACTERISTICS 27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified. Dropout vs. Io ( fixed 3.0V) 400 350 300 250 Dropout (mV) 200 250 Dropout vs. Temp (fixed 3.0V) IOUT=100mA IOUT=50mA Dropout (mV) 150 200 150 100 50 0 0 50 100 Io (mA) 150 200 T=125 T=27 T=-40 100 50 0 -50 -20 10 40 70 Temp (deg) 100 130 Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 5 TYPICAL CHARACTERISTICS 27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified. Dropout vs. Temp (fixed 3.0V) 2.5 Io=1mA Io=0.1mA 2.0 50 45 40 35 Iq vs. Vin (fixed 3.0V, Dropout (mV) 1.5 Iq (uA) 30 25 20 15 1.0 0.5 10 5 0.0 -50 0 -20 10 40 70 Temp (deg) 100 130 0 1 2 3 4 Vin (V) 5 6 7 Iq vs. Temp (fixed 3.0V, Io=0uA) 50 Vin = 7V Vin =5.5V Vin = 4V 45 Ignd vs. Vin (fixed 3.0V) 250 IOUT=100mA IOUT=50mA IOUT=0.1mA 200 Ignd (uA) 40 150 Iq (uA) 35 100 30 50 25 -50 -20 10 40 70 Temp (deg) 100 130 0 3 4 5 Vin (V) 6 7 Ignd vs. Io (fixed 3.0V) 220 195 170 3.01 3.03 Vout vs. Temp (fixed 3.0V) Vin = 7V Vin = 5.5V Vin = 4V 3.02 Vin = 7V Vin = 4V Ignd (uA) Vout (V) 145 120 95 70 3.00 2.99 2.98 45 20 0 50 100 Io (mA) 150 200 2.97 -50 -20 10 40 Temp (deg) 70 100 130 Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 6 TYPICAL CHARACTERISTICS: Continued 27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified. Line Regulation (fixed 3.0V) 3.006 Io=0.1mA Io=1mA Io=50mA Io=100mA 3.004 Load Regulation (fixed 3.0V) 3.004 3.002 Vin = 7V Vin = 5.5V Vin = 4V Vout (V) 3.002 3.000 3.000 2.998 2.998 2.996 2.996 2.994 2.994 3 4 5 Vin (V) 6 7 2.992 0 50 100 150 Io (mA) 200 250 300 Load transient Response, 100mA Step, 7VIN 80mA Current Limit vs. Temp (fixed 3.0V, Vin=4V) 200 3.0V fixed 3.0 VOUT fixed VIN = 7V, IOUT = 100mA CIN = COUT = 1F Cer. Cap 60mA 40mA 20mA Icl (mA) 0mA 150 -20mA -40mA 100A IOUT TR = TF = 100ns 100mA 0mA 100 -50 0 50 Temp (deg) 100 150 Load Transient Response, 100mA Step, 4VIN 80mA 3.0 VOUT fixed VIN = 4V, IOUT = 100mA CIN = COUT = 1F Cer. Cap 60mA 40mA 20mA 0mA -20mA -40mA 100A IOUT TR = TF = 100ns 100mA 0mA Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 7 TYPICAL CHARACTERISTICS: Continued 27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified. Power Supply Rejection Ratio REF LEVEL 0.000dB /DIV 10.000dB 0 -20 (dB) -40 -60 -80 IOUT = 100A COUT = 1F VIN = 4V VOUT = 3V 10 100 10.000Hz -100 1k 10k 100k 1M 10M START STOP 10 000 000.000Hz Frequency (HZ) Power Supply Rejection Ratio REF LEVEL 0.000dB /DIV 10.000dB Power Supply Rejection Ratio REF LEVEL 0.000dB /DIV 10.000dB 0 0 -20 -20 (dB) -40 -40 -60 (dB) -60 -80 IOUT = 1mA COUT = 2.2F 10 100 10.000Hz -80 IOUT = 10mA COUT = 2.2F 100 10.000Hz -100 1k 10k 100k 1M 10M START STOP 10 000 000.000Hz -100 10 START 1k 10k 100k 1M 10M STOP 10 000 000.000Hz Frequency (HZ) Frequency (HZ) Power Supply Rejection Ratio REF LEVEL 0.000dB /DIV 10.000dB 0 -20 (dB) -40 -60 -80 IOUT = 100mA COUT = 2.2F 100 10.000Hz -100 10 START 1k 10k 100k 1M 10M STOP 10 000 000.000Hz Frequency (HZ) Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 8 PACKAGE: 5 PIN SOT-23 b C L e E e1 D C L A A2 A C L a 0.20/(5.08) DATUM 'A' C A1 A .10 E1 L 2 SYMBOL MIN inch / mm 0.90 / (22.86) 0.00 / (0.00) 0.90 / (22.86) 0.25 / (6.35) 0.09 / (2.286) 2.80 / (71.12) 2.60 / (66.04) 1.50 / (38.1) 0.35 / (8.89) MAX inch / mm 1.45 / (36.83) 0.15 / (3.81) 1.30 / (33.02) 0.50 / (12.7) 0.20 / (5.08) 3.10 / (78.74) 3.00 / (76.2) 1.75 / (38.1) 0.55 A A1 A2 b C D E E1 L e e1 a 0.95ref / (24.13) 1.90ref / (48.26) 0 O 10 O Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 9 ORDERING INFORMATION Part Number Topmark Temperature Range Package Type SP78LC30EM5 ..................... T1 ......................... -40C to +125C ............................... SOT-23-5 SP78LC30EM5/TR ............... T1 ......................... -40C to +125C ....... (Tape & Reel) SOT-23-5 Corporation SIGNAL PROCESSING EXCELLENCE Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Rev. 5/19/03 SP78LC00 100mA CMOS LDO Regulator (c) Copyright 2003 Sipex Corporation 10 |
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